Title :
A 3-GS/s 5-bit 36-mW flash ADC in 65-nm CMOS
Author :
Ito, Tomohiko ; Itakura, Tetsuro
Author_Institution :
Corp. R&D Center, Toshiba Corp., Kawasaki, Japan
Abstract :
A 3-GS/s 5-bit flash ADC is fabricated for millimeter-wave communication systems in 65nm CMOS technology. The proposed foreground calibration method reduces the input-referred DC offset, achieving the resolution of 4.7 ENOB at 200MHz input frequency and keeping more than 4.3 ENOB even at Nyquist. The ADC consumes only 36.2mW including the power of the clock buffer and the resistor ladder from 1-V supply. The ADC has the FoM of 0.6pJ/conv at Nyquist.
Keywords :
CMOS integrated circuits; analogue-digital conversion; CMOS technology; DC offset; clock buffer; flash ADC; input frequency; millimeter wave communication systems; power 36 mW; size 65 nm; CMOS integrated circuits; Calibration; Gain; Linearity; Signal resolution; Transistors;
Conference_Titel :
Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-8300-6
DOI :
10.1109/ASSCC.2010.5716585
