Title :
A 0.3mW 1.4mm2 Motion Estimation Processor for Mobile Video Application
Author :
Hiratsuka, Seiichiro ; Goto, Satoshi ; Ikenaga, Takeshi
Author_Institution :
Fukuoka Ind., Sci. & Technol. Found., Fukuoka
Abstract :
Motion estimation (ME) is a key processing in video encoding systems. Since it requires huge computational complexity, many algorithms and LSI architectures have been proposed to reduce it. Conventional LSIs, however, are not sufficient for mobile applications which require both flexibility and low power dissipation. This paper describes an application specific instruction processor (ASIP) LSI for ME processing. It has a dedicated unit for SAD (sum of absolute difference) operations. By applying our proposed ultra-low ME algorithm named ULCMEA, it can reduce power while keeping high flexibility. A chip capable of operating at 80 MHz was fabricated using TSMC 0.18-mum CMOS technology. 15 K logic gates and 32 Kbit SRAM have been integrated into 1.4 mm chip. Typical power dissipation is 0.3-mW for QCIF 15 frame/ sec ME processing.
Keywords :
CMOS integrated circuits; application specific integrated circuits; large scale integration; motion estimation; video coding; LSI architecture; SRAM integration; TSMC CMOS technology; application specific instruction processor; computational complexity; frequency 80 MHz; logic gates; mobile video application; motion estimation processor; power 0.3 mW; size 0.18 mum; size 1.4 mm; sum-of-absolute difference operations; video encoding systems; Application specific processors; CMOS logic circuits; CMOS technology; Computational complexity; Computer architecture; Encoding; Large scale integration; Logic gates; Motion estimation; Power dissipation;
Conference_Titel :
Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian
Conference_Location :
Hangzhou
Print_ISBN :
0-7803-9734-7
Electronic_ISBN :
0-7803-97375-5
DOI :
10.1109/ASSCC.2006.357862