DocumentCode
2560002
Title
An effective one-trap-level CAD model for the general SOC integration platform - particle-beam stand (PBS) - when modeling proton-caused local semi-insulating regions
Author
Liao, Chungpin ; Duh, T.S. ; Yang, T.N. ; Lan, S.M. ; Liu, C.W. ; Yang, T.T. ; Hsu, J.S. ; Shao, H.Y.
Author_Institution
Graduate Inst. of Electro-Opt. & Mater. Sci., Nat. Huwei Univ. of Sci. & Technol., Yunlin, Taiwan
fYear
2004
fDate
9-10 Sept. 2004
Firstpage
166
Lastpage
169
Abstract
A π technology (= particle-enhanced isolation) was proposed to employ energetic proton beams on the already-manufactured mixed-mode IC wafers (prior to packaging) for the suppression of undesirable substrate coupling (C. P. Liao et al., April 4, 2000). However, up to this day the physics behind this proton-caused defect phase is never clear. An effective 1-level defect model is constructed using experimental results and existing single-trap-level theory (Moll J. L. 1964) and TRIM (or SRIM) (http://www.srim.org/) code-simulated parameters. The found effective single trap level (Eτ) is at about +0.24 eV in n-Si and at -0.34 eV in p-Si, measuring from the center of the energy band-gap.
Keywords
CAD; band structure; electron traps; elemental semiconductors; integrated circuit manufacture; proton effects; radiation hardening (electronics); silicon; system-on-chip; computer-aided design model; energy band-gap; integrated circuit wafer; particle-beam stand; particle-enhanced isolation; proton beam; proton-caused local semi-insulating region; substrate coupling; system-on-chip integration; Integrated circuit modeling; Integrated circuit packaging; Isolation technology; Materials science and technology; Particle beams; Protons; Semiconductor device modeling; Silicon; Substrates; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing Technology Workshop Proceedings, 2004
Print_ISBN
0-7803-8469-5
Type
conf
DOI
10.1109/SMTW.2004.1393756
Filename
1393756
Link To Document