Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique

Author

Maji, Debabrata ; Crupi, F. ; Magnone, P. ; Giusi, G. ; Pace, C. ; Simoen, E. ; Rao, V. Ramgopal

Author_Institution

Dept. of Electr. Eng., Indian Inst. of Technol., Bombay, India

fYear

2009

fDate

1-2 June 2009

Firstpage

1

Lastpage

4

Abstract

The interface trap density of fresh TiN/TaN gated HfO₂/SiO₂/Si/epi-Ge pMOSFETs is measured using the DCIV technique. Its temperature dependence is also discussed here. We observe a polarity dependent DCIV peak shift. The bias temperature stress induced interface trapped charge and oxide trapped charge shifts are also systematically investigated in this work.

Keywords

germanium; hafnium compounds; interface states; power MOSFET; silicon compounds; tantalum compounds; titanium compounds; DCIV technique; Ge pMOSFETs; HfO₂-SiO₂-Si; TiN-TaN; bias temperature; interface trap density; oxide trapped charge shifts; oxide traps; polarity dependent DCIV peak shift; stress induced interface trapped charge; temperature dependence; Charge measurement; Current measurement; Dielectrics; Electron devices; Hafnium oxide; Implants; MOSFETs; Stress; Temperature; Tin; DCIV; Ge pMOSFET; interface trap; oxide trap;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Semiconductor Technology, 2009. IEDST '09. 2nd International Workshop on

Conference_Location

Mumbai

Print_ISBN

978-1-4244-3831-0

Electronic_ISBN

978-1-4244-3832-7

Type

conf

DOI

10.1109/EDST.2009.5166133

Filename

5166133