DocumentCode
2560040
Title
Zero-crossing detector based reconfigurable analog system
Author
Lajevardi, Payam ; Chandrakasan, Anantha ; Lee, Hae-Seung
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol. (MIT), Cambridge, MA, USA
fYear
2010
fDate
8-10 Nov. 2010
Firstpage
1
Lastpage
4
Abstract
A reconfigurable analog system is presented that implements pipelined ADCs, switched-capacitor filters, and programmable gain amplifiers. Each block employs a zero-crossing based circuit for easy reconfigurability and power efficiency. Configured as a 10-bit ADC, the chip consumes 1.92mW at 50MSPS with ENOB of 8.02b and FOM of 150fJ/conversion-step. A third order Butterworth filter is also demonstrated. The chip is implemented in 65nm technology.
Keywords
Butterworth filters; analogue-digital conversion; operational amplifiers; switched capacitor filters; pipelined ADC; power 1.92 mW; programmable gain amplifiers; reconfigurable analog system; size 65 nm; switched-capacitor filters; third order Butterworth filter; zero-crossing detector; Capacitors; Low pass filters; Matched filters; Power demand; Resistors; Solid state circuits; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian
Conference_Location
Beijing
Print_ISBN
978-1-4244-8300-6
Type
conf
DOI
10.1109/ASSCC.2010.5716604
Filename
5716604
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