A 120-GHz transmitter and receiver chipset with 9-Gbps data rate using 65-nm CMOS technology

The design and measured results of a 120-GHz transmitter and receiver chipset are described in this paper. A simple amplitude shift keying (ASK) is adopted for this chipset. The proposed transmitter and receiver are fabricated using 65-nm CMOS technology. The current consumptions are 19.2 mA for the transmitter and 48.2 mA for the receiver. A 9-Gbps PRBS is successfully transferred from the transmitter to the receiver with the bit error rate less than 10^-9.