• DocumentCode
    2560235
  • Title

    A systematic approach to defining the structure of a test suite for the NELSIS IC design system

  • Author

    van Dijk, G.J. ; Sim, M.N. ; Kist, P.M. ; Schot, C.A.

  • Author_Institution
    Delft Univ. of Technol., Netherlands
  • fYear
    1993
  • fDate
    22-25 Feb 1993
  • Firstpage
    334
  • Lastpage
    339
  • Abstract
    The systematic testing of a large CAD tool-set requires a complex collection of tests called a test-suite. The test-suite is managed and driven by a test system (harness). The goal is to reduce the effort involved in the definition of the test-suite through a systematic approach. In the present approach a type of composite test called a device test which is constructed of primitive tests is described. This enables splitting the test-suite definition into two activities: the definition of the test structure for each device test, and the definition of the structural relations between the device test. The advantage of this approach is that each device test may be constructed and executed independently. This enhances the modularity of the architecture by reducing the dependencies in the test suite. The emphasis is on the structural relations between the device tests. A protocol for defining the structural relations is proposed, and the protocol´s usefulness is demonstrated by applying it to a real-life situation, namely, defining a test structure for the NELSIS IC Design System
  • Keywords
    automatic test software; circuit CAD; integrated circuit design; program testing; protocols; visual databases; NELSIS IC design system; composite test; device test; harness; large CAD tool-set; modularity; protocol; structural relations; test structure; test system; test-suite; Application software; Automatic testing; Costs; Design automation; Integrated circuit testing; Printing; Protocols; Software testing; Storage automation; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-3410-3
  • Type

    conf

  • DOI
    10.1109/EDAC.1993.386453
  • Filename
    386453