DocumentCode :
2560580
Title :
A 1V 350μW 92dB SNDR 24 kHz ΔΣ modulator in 0.18μm CMOS
Author :
Liu, Liyuan ; Li, DongMei ; Chen, Liangdong ; Zhang, Chun ; Wei, Shaojun ; Wang, ZhiHua
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear :
2010
fDate :
8-10 Nov. 2010
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a high precision multi-bit audio ΔΣ modulator working under IV supply. We propose a kind of asynchronous 4-bit successive approximation quantizer without fast clock generation. Feed-forward topology with digital summing is adopted to relax the amplifier design requirement. Power efficient single stage OTA is adopted to drive the large sampling capacitor with low power consumption. Fabricated in 0.18μm standard CMOS, the modulator achieves 92dB SNDR with 24 kHz bandwidth and the power consumption is only 350μW. The active core die area is 0.64mm2.
Keywords :
CMOS integrated circuits; clocks; delta-sigma modulation; operational amplifiers; ΔΣ modulator; OTA; asynchronous successive approximation quantizer; bandwidth 24 kHz; clock generation; digital summing; feedforward topology; operational amplifiers; power 350 muW; size 0.18 mum; standard CMOS; voltage 1 V; CMOS integrated circuits; Capacitors; Choppers; Clocks; Modulation; Noise; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-8300-6
Type :
conf
DOI :
10.1109/ASSCC.2010.5716629
Filename :
5716629
Link To Document :
بازگشت