Title :
Table of contents
Abstract :
The following topics are dealt with: magnetically coupled coil structures; PCB-to-active interposer wireless power transfer; 2.5D-3D-IC; hybrid silicon interposer; glass interposer; system-in-package; through silicon vias; vertical links; capacitive coupling; planar interconnections; cylindrical interconnections; S-parameters; bounded size training set; ANN; indirect contact probing method; via arrays; electronic packaging; fast incremental 3D full-wave analysis; package-board design iterations; eigen-GCR; layered media; parallel plate impedance; printed circuit boards; de-embedding method; full wave solver; high speed channels; PCB-package codesign; super wideband X-complementary split ring resonator structure; power distribution network; EMI coupling; command lines; solar array switching strings; spacecraft; modular power system; bus bar scheme; high power communication satellite; flex cables; high speed serial links; SATA 3.0 channels; re-driver; null field preconditioner; fast 3D full-wave MoM package-board extraction; resonant power supply noise reduction; on-die decoupling capacitors; organic interposer; sockets; package-on-package electrical validation & design; BGA package; nonideal ground induced resonance; DDR4 RDIMM; timing margins; guard trace;periodic structure; signal integrity; simultaneous switching output buffers; SSO buffers; interlayer crosstalk; stripline; metal patch; power supply noise; electromagnetic radiation; chip-package anti-resonance; jitter; very long pattern length waveform; inter-die communication; crosstalk reduction; compact optical transceiver module; high-speed data transmission system; half mode substrate integrated waveguide; noise suppression; DC-DC converter; silicon-package power delivery cosimulation; voltage regulators; microprocessors; QPSK schemes; EMC-aware analysis; low-cost receiver circuit; injection locking; common-mode filter design; signal interference technique; wideband common-mode suppression filter; and d- fferential signal transmission.
Keywords :
DC-DC power convertors; S-parameters; ball grid arrays; buffer circuits; chip scale packaging; coils; crosstalk; distribution networks; electromagnetic compatibility; electromagnetic interference; filtering theory; inductive power transmission; inhomogeneous media; integrated circuit interconnections; interference suppression; jitter; method of moments; microprocessor chips; neural nets; optical transceivers; power supply circuits; printed circuit design; resonators; solar cell arrays; strip lines; substrate integrated waveguides; system-in-package; telecommunication links; three-dimensional integrated circuits; voltage regulators; 2.5D-3D-IC; ANN; BGA package; DC-DC converter; DDR4 RDIMM; EMC-aware analysis; EMI coupling; PCB-package codesign; PCB-to-active interposer wireless power transfer; QPSK schemes; S-parameters; SATA 3.0 channels; SSO buffers; bounded size training set; bus bar scheme; capacitive coupling; chip-package anti-resonance; command lines; common-mode filter design; compact optical transceiver module; contact probing method; crosstalk reduction; cylindrical interconnections; de-embedding method; differential signal transmission; eigen-GCR; electromagnetic radiation; electronic packaging; fast 3D full-wave MoM package-board extraction; fast incremental 3D full-wave analysis; flex cables; full wave solver; glass interposer; guard trace; half mode substrate integrated waveguide; high power communication satellite; high speed channels; high speed serial links; high-speed data transmission system; hybrid silicon interposer; injection locking; inter-die communication; interlayer crosstalk; jitter; layered media; low-cost receiver circuit; magnetically coupled coil structures; metal patch; microprocessors; modular power system; noise suppression; nonideal ground induced resonance; null field preconditioner; on-die decoupling capacitors; organic interposer; package-board design iterations; package-on-package electrical validation & design; parallel plate impedance; periodic structure; planar interconnections; power distribution network; printed circuit boards; re-driver; resonant power supply noise reduction; signal integrity; signal interference technique; silicon-package power delivery cosimulation; simultaneous switching output buffers; sockets; solar array switching strings; spacecraft; stripline; super wideband X-complementary split ring resonator structure; system-in-package; through silicon vias; timing margins; vertical links; very long pattern length waveform; via arrays; voltage regulators; wideband common-mode suppression filter;
Conference_Titel :
Electrical Design of Advanced Packaging & Systems Symposium (EDAPS), 2014 IEEE
Conference_Location :
Bangalore
DOI :
10.1109/EDAPS.2014.7030793