Author :
Sugibayashi, Tadahiko ; Sakimura, Noboru ; Honda, Takeshi ; Nagahara, Kiyokazu ; Tsuji, Kiyotaka ; Numata, Hideaki ; Miura, Sadahiko ; Shimura, Ken-ichi ; Kato, Yuko ; Saito, Shinsaku ; Fukumoto, Yoshiyuki ; Honjo, Hiroaki ; Suzuki, Tetsuhiro ; Suemitsu,
Abstract :
We have developed a 16 Mb toggle MRAM. It has some 100-MHz burst modes that are compatible with a pseudo SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, an interleaved and pipelined memory-array group activation scheme and a noise insulation switch scheme have been proposed. The MRAM was fabricated with a 0.13-mum CMOS and 0.24-mum MRAM process with five metal layers.
Keywords :
CMOS integrated circuits; SRAM chips; circuit noise; interleaved storage; CMOS process; MRAM process; burst modes; frequency 100 MHz; interleaved memory-array group activation scheme; metal layers; noise insulation switch scheme; pipelined memory-array group activation scheme; pseudo SRAM; size 0.13 mum; size 0.24 mum; storage capacity 16 Mbit; toggle MRAM; Acceleration; Buffer storage; CMOS process; Circuits; Laboratories; Magnetooptic recording; Prefetching; Random access memory; Switches; Writing;
