• DocumentCode
    2561220
  • Title

    Verifying equivalence of functions with unknown input correspondence

  • Author

    Cheng, David Ihsin ; Marek-Sadowska, Malgorzata

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA, USA
  • fYear
    1993
  • fDate
    22-25 Feb 1993
  • Firstpage
    81
  • Lastpage
    85
  • Abstract
    It is pointed out by the authors that most of the methods that tackle the problem of verifying equivalence of two Boolean functions assume that the correspondence of input variables is known. A method that does not require this assumption is proposed. The key to the method is to associate a new signature with each input variable, thereby effectively establishing partial (sometimes total) correspondence between the sets of input variables. The descriptive power of the new signature appears to be very effective
  • Keywords
    Boolean functions; equivalence classes; logic design; Boolean functions; logic synthesis; logic verification; partial correspondence; partner patterns; signature of variables; unknown input correspondence; verifying equivalence; Binary decision diagrams; Boolean functions; Circuits; Data structures; Input variables; Libraries;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-3410-3
  • Type

    conf

  • DOI
    10.1109/EDAC.1993.386496
  • Filename
    386496