Title :
High-level synthesis of asynchronous systems: Scheduling and process synchronization
Author :
Badia, Rosa M. ; Cortadella, Jordi
Author_Institution :
Dept. of Comput. Archit., Polytech. Univ. of Catalonia, Barcelona, Spain
Abstract :
Basic concepts for scheduling algorithms and control synthesis in high-level synthesis of asynchronous circuits are defined. Two scheduling strategies are presented and evaluated. Experiments on different benchmarks show that efficient asynchronous schedules can be obtained. Control is modeled in a distributed fashion with local controllers synchronizing between them by means of handshaking protocols
Keywords :
asynchronous circuits; data flow graphs; high level synthesis; scheduling; synchronisation; asynchronous circuits; benchmarks; control data flow graph; control synthesis; handshaking protocols; high-level synthesis; process synchronization; scheduling strategies; Asynchronous circuits; Circuit synthesis; Control system synthesis; Delay; Hardware; High level synthesis; Processor scheduling; Scheduling algorithm; Signal synthesis; Synchronization;
Conference_Titel :
Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Conference_Location :
Paris
Print_ISBN :
0-8186-3410-3
DOI :
10.1109/EDAC.1993.386498
