Title :
A 800MT/s Multiprocessor Bus Interface With Strobe Centering Architecture
Author :
Muljono, Harry ; Rusu, Stefan ; Tian, Kathy ; Atria, M. ; Chan, Marlene ; Lin, Charlie
Author_Institution :
Intel Co., Santa Clara
Abstract :
A 65 nm 1.2 V GTL bus interface achieves 800 MT/s 6.4 GB/S data rate in a 3-load multi-processor (MP) environment. To enable a 20% increase in data rate compared to previous design, it utilizes a staged driver, DLL controlled predriver, Tco compensation, data/strobe time shifter, high gain differential amplifier as well as advanced process, voltage and temperature (PVT) compensation design.
Keywords :
multiprocessing systems; system buses; 800MT/s multiprocessor bus interface; DLL controlled predriver; Tco compensation; high gain differential amplifier; staged driver; strobe centering architecture; strobe time shifter; Atherosclerosis; Bridge circuits; Delay lines; Differential amplifiers; Driver circuits; Equations; Impedance; Microprocessors; Temperature control; Voltage control;
Conference_Titel :
Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian
Conference_Location :
Hangzhou
Print_ISBN :
0-7803-9734-7
Electronic_ISBN :
0-7803-97375-5
DOI :
10.1109/ASSCC.2006.357937
