DocumentCode
2561574
Title
A Low-Voltage and Area-Efficient Adaptive SI SDADC for Bio-Acquisition Microsystems
Author
Cheng, Chih-Jen ; Lee, Shuenn-Yuh ; Lo, Yuan
Author_Institution
Nat. Chung-Cheng Univ., Minsyong
fYear
2006
fDate
13-15 Nov. 2006
Firstpage
431
Lastpage
434
Abstract
An ultra-low voltage adaptive Sigma-Delta Analog-to-Digital Converter (SDADC) with a 10-bit dynamic range for bio-microsystem applications is presented. The proposed SDADC includes a Switched-current Sigma-Delta Modulator (SISDM) and a digital decimator. Moreover, a new single-multiplier structure is presented to implement the Finite Impulse Response (FIR) digital filters which are the major hardware elements in the decimator. Measurement results show that the SISDM has a dynamic range over 6 dB and a power consumption of 180 muW with an input signal of 1.25 kHz sinusoid wave and 5 kHz bandwidth under a single 0.8 V power supply for ENG signals. Besides, the post layout simulations of SDADC including SISDM and decimator reveal that the dynamic range is still over 60 dB without harming by digital circuits.
Keywords
biomedical electronics; lab-on-a-chip; sigma-delta modulation; bandwidth 5 kHz; bio-acquisition microsystems; digital decimator; finite impulse response digital filters; frequency 1.25 kHz; power 180 muW; single-multiplier structure; switched-current sigma-delta modulator; ultra-low voltage adaptive sigma-delta analog-to-digital converter; voltage 0.8 V; Analog-digital conversion; Delta-sigma modulation; Digital filters; Digital modulation; Dynamic range; Energy consumption; Finite impulse response filter; Hardware; Power measurement; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian
Conference_Location
Hangzhou
Print_ISBN
0-7803-9734-7
Electronic_ISBN
0-7803-97375-5
Type
conf
DOI
10.1109/ASSCC.2006.357943
Filename
4197682
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