Title :
Two techniques for improving performance on bus-based multiprocessors
Author :
Anderson, Craig ; Baer, J.-L.
Author_Institution :
Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
Abstract :
We explore two techniques for reducing memory latency in bus-based multiprocessors. The first one, designed for sector caches, is a snoopy cache coherence protocol that uses a large transfer block to take advantage of spatial locality, while using a small coherence block (called a subblock to avoid false sharing). The second technique is read snarfing (or read broadcasting), in which all caches can acquire data transmitted in response to a read request to update invalid blocks in their own cache. We evaluated the two techniques by simulating 6 applications that exhibit a variety of reference patterns. We compared the performance of the new protocol against that of the Illinois protocol with both small and large block sizes and found that it was effective in reducing memory latency and providing more consistent, good results than the Illinois protocol with a given line size. Read snarfing also improved performance mostly for protocols that use large line sizes
Keywords :
cache storage; communication complexity; memory protocols; shared memory systems; system buses; Illinois protocol; bus-based multiprocessors; coherence block; false sharing; invalid blocks; memory latency; read broadcasting; read snarfing; reference patterns; sector caches; snoopy cache coherence protocol; spatial locality; subblock; transfer block; Broadcasting; Coherence; Computer science; Delay; Parallel processing; Protocols;
Conference_Titel :
High-Performance Computer Architecture, 1995. Proceedings., First IEEE Symposium on
Conference_Location :
Raleigh, NC
Print_ISBN :
0-8186-6445-2
DOI :
10.1109/HPCA.1995.386536