DocumentCode :
2562354
Title :
Proceedings of 1995 1st IEEE Symposium on High Performance Computer Architecture
fYear :
1995
fDate :
22-25 Jan. 1995
Abstract :
The following topics were dealt with: register management; interconnection networks; latency reduction; routing in mesh; cache memory; modelling and performance evaluation; synchronisation and scheduling; memory management; cache coherence; multithreaded architecture; special purpose architechtures; and code optimisation
Keywords :
cache storage; computer architecture; multiprocessor interconnection networks; performance evaluation; cache memory; code optimisation; interconnection networks; latency reduction; memory management; modelling; multithreaded architecture; performance evaluation; register management; routing in mesh; scheduling; special purpose architechtures; synchronisation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High-Performance Computer Architecture, 1995. Proceedings., First IEEE Symposium on
Conference_Location :
Raleigh, NC, USA
Print_ISBN :
0-8186-6445-2
Type :
conf
DOI :
10.1109/HPCA.1995.386561
Filename :
386561
Link To Document :
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