ESD protection for RF/AMS ICs: Design and optimization

Author

Wang, X. ; Tang, H. ; Lin, L. ; Fang, Q. ; Zhao, H. ; Wang, Albert ; Zhang, G. ; Wang, Xiongfei ; Zhou, Y. ; Yang, Lee ; Chen, H.

Author_Institution

Dept. of Electr. Eng., Univ. of California, Riverside, CA, USA

fYear

2009

fDate

18-20 May 2009

Firstpage

25

Lastpage

28

Abstract

This paper reviews key factors to practical ESD protection design for RF and analog/mixed-signal (AMS) ICs, including general challenges emerging, ESD-RFIC interactions, RF ESD design optimization and prediction, RF ESD design characterization, ESD-RFIC co-design technique, etc. Practical design examples are discussed. It means to provide a systematic and practical design flow for whole-chip ESD protection design optimization and prediction for RF/AMS ICs to ensure 1^st Si design success.

Keywords

analogue integrated circuits; circuit optimisation; electrostatic discharge; integrated circuit design; mixed analogue-digital integrated circuits; radiofrequency integrated circuits; ESD-RFIC codesign; ESD-RFIC interaction; RF ESD design characterization; RF ESD design optimization; RF ESD design prediction; analog/mixed-signal IC; whole-chip ESD protection design optimization; Degradation; Design optimization; Electrostatic discharge; Foundries; Integrated circuit noise; Noise figure; Noise measurement; Protection; Radio frequency; Radiofrequency integrated circuits; ESD protection; RF ESD; co-design;

fLanguage

English

Publisher

ieee

Conference_Titel

IC Design and Technology, 2009. ICICDT '09. IEEE International Conference on

Conference_Location

Austin, TX

Print_ISBN

978-1-4244-2933-2

Electronic_ISBN

978-1-4244-2934-9

Type

conf

DOI

10.1109/ICICDT.2009.5166257

Filename

5166257