A 2.5 GHz radiation hard fully self-biased PLL using 0.25 µm SOS-CMOS technology

This paper presents a radiation hard PLL using 0.25 mum SOS-CMOS technology for space applications. This PLL is fully self-biased and gives output frequency of 2.5 GHz. This robust PLL successfully performs for all the process corners from -40degC to 80degC under Cadence-SpectreRF schematic and layout simulations. A new modification has been done on the differential buffers of the VCO used in the PLL to reduce phase noise. Simulation results from extracted layout including buffers and pads are enlisted for pre and post radiation environments.