DocumentCode :
256339
Title :
A design of analog front-end for passive UHF RFID tag
Author :
Hassouni, Smail ; Qjidaa, Hassan
Author_Institution :
LESSI, Sidi Mohamed Ben Abdellah Univ., Fez, Morocco
fYear :
2014
fDate :
14-16 April 2014
Firstpage :
1314
Lastpage :
1317
Abstract :
The design of the analog front end proposed is one of the key elements in a passive RFID tag, including these diverse operations as a matching network for maximum power delivery, CMOS rectifier, voltage regulation, modulation and demodulation of the incident RF wave. The proposed five stages CMOS rectifier sub threshold which gives 10.8% of the power conversion efficiency and a 18.21m of read range is obtained under conditions of 900Mhz, -18.75 dBm input power and 1M DC output load. The equations for predicting the performance of the analog front end are provided and verified by both simulation results in 90nm CMOS process.
Keywords :
CMOS integrated circuits; UHF integrated circuits; passive networks; radiofrequency identification; rectifying circuits; CMOS process; CMOS rectifier; RF wave demodulation; RF wave modulation; analog front-end; frequency 900 MHz; matching network; maximum power delivery; passive UHF RFID tag; power conversion efficiency; size 90 nm; voltage regulation; CMOS integrated circuits; Demodulation; Passive RFID tags; Rectifiers; Threshold voltage; Transponders; Passive; front-end; radio-frequency identification (RFID); ultra high frequency (UHF);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multimedia Computing and Systems (ICMCS), 2014 International Conference on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4799-3823-0
Type :
conf
DOI :
10.1109/ICMCS.2014.6911276
Filename :
6911276
Link To Document :
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