Robust multi-VT 4T SRAM cell in 45nm thin BOx fully-depleted SOI technology with ground plane

In this paper, a new compact, robust and low leakage 4T SRAM cell is proposed. It is based on an original concept of multi-VT thin buried oxide (BOx) fully-depleted (FD) silicon-on-insulator (SOI) MOSFETs with ground plane (GP) in 45 nm technology node. The stability of the cell reaches 20% of V_DD and the cell leakage is 13 pA. A minimum cell area of 0.209 mum² with specific 45 nm SRAM design rules has been reached. This is 16% smaller than the smallest 6T SRAM cell reported in 45 nm bulk technology. Moreover, the proposed cell displays a good manufacturability. It is a cost saving process because it requires only one GP doping, no substrate contact at the cell level and is based on a conventional FDSOI process flow.