DocumentCode :
2565236
Title :
A C-based RTL Design Verification Methodology For Complex Microprocessor
Author :
Yim, Joon-Seo ; Hwang, Yoon-Ho ; Park, Chang-Jae ; Choi, Hoon ; Yang, Woo-Seung ; Oh, Hun-Seung ; Park, In-Cheol ; Kyung, Chong-Min
Author_Institution :
KAIST
fYear :
1997
fDate :
9-13 June 1997
Firstpage :
83
Lastpage :
88
Keywords :
Circuit simulation; Clocks; Design methodology; Discrete event simulation; Formal verification; Hardware design languages; Microprocessors; Permission; Polarization; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location :
Anaheim, CA, USA
ISSN :
0738-100X
Print_ISBN :
0-7803-4093-0
Type :
conf
DOI :
10.1109/DAC.1997.597122
Filename :
597122
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2565236
