DocumentCode :
2565758
Title :
Reliable design with multiple clock domains
Author :
Czeck, Ed ; Nanavati, Ravi ; Stoy, Joe
Author_Institution :
Bluespec Inc., Waltham, MA
fYear :
2006
fDate :
27-30 July 2006
Firstpage :
139
Lastpage :
148
Abstract :
We present a set of guiding principles for the management of multiple clocks domains in the design of a high-level hardware description language. Our motivation of the requirements is based on typical design problems; the solutions are based on common engineering practices and appropriate language abstractions. We include examples, and conclude with some comments based on a design experience
Keywords :
hardware description languages; high-level hardware description language; language abstractions; multiple clock domains; reliable design; Circuits; Clocks; Design engineering; Design methodology; Energy consumption; Hardware design languages; Logic design; Oscillators; Power engineering and energy; Signal design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Formal Methods and Models for Co-Design, 2006. MEMOCODE '06. Proceedings. Fourth ACM and IEEE International Conference on
Conference_Location :
Napa, CA
Print_ISBN :
1-4244-0421-5
Type :
conf
DOI :
10.1109/MEMCOD.2006.1695917
Filename :
1695917
Link To Document :
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