• DocumentCode
    2566635
  • Title

    A 0.5V 74dB SNDR 25kHz CT /spl Delta//spl Sigma/ Modulator with Return-to-Open DAC

  • Author

    Kong-Pang Pun ; Chatterjee, Saptarshi ; Kinget, Peter

  • Author_Institution
    Chinese Univ. of Hong Kong, Kowloon
  • fYear
    2006
  • fDate
    6-9 Feb. 2006
  • Firstpage
    181
  • Lastpage
    190
  • Abstract
    A 0.5V 3rd-order 1b fully differential CT DeltaSigma modulator in a 0.18mum CMOS process is presented. A special return-to-open DAC, a body-input gate-clocked comparator, and body-input OTAs for the active-RC loop filter enable the ultra-low voltage operation. The 0.6mm 2 chip consumes 370muW and achieves a peak SNDR of 74dB in a 25kHz BW
  • Keywords
    CMOS integrated circuits; RC circuits; active filters; comparators (circuits); delta-sigma modulation; low-power electronics; operational amplifiers; 0.18 micron; 0.5 V; 25 kHz; 370 mW; CMOS process; CT DeltaSigma modulator; OTA; SNDR; active-RC loop filter; body-input gate-clocked comparator; return-to-open DAC; ultra-low voltage; CMOS technology; Circuits; Clocks; Degradation; Delta modulation; Feedback; Frequency; Resistors; Switches; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    1-4244-0079-1
  • Type

    conf

  • DOI
    10.1109/ISSCC.2006.1696047
  • Filename
    1696047
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2566635