Title :
Hierarchical 2-D Field Solution For Capacitance Extraction For VLSI Interconnect Modeling
Author :
Dengi, Aykut E. ; Rohrer, Ronald A.
Author_Institution :
Motorola Inc.
Keywords :
Capacitance; Conductors; Delay systems; Dielectrics; Integrated circuit interconnections; Integrated circuit technology; Libraries; Permission; Semiconductor device modeling; Very large scale integration;
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-4093-0
DOI :
10.1109/DAC.1997.597130
