• DocumentCode
    2566648
  • Title

    Hierarchical 2-D Field Solution For Capacitance Extraction For VLSI Interconnect Modeling

  • Author

    Dengi, Aykut E. ; Rohrer, Ronald A.

  • Author_Institution
    Motorola Inc.
  • fYear
    1997
  • fDate
    9-13 June 1997
  • Firstpage
    127
  • Lastpage
    132
  • Keywords
    Capacitance; Conductors; Delay systems; Dielectrics; Integrated circuit interconnections; Integrated circuit technology; Libraries; Permission; Semiconductor device modeling; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1997. Proceedings of the 34th
  • Conference_Location
    Anaheim, CA, USA
  • ISSN
    0738-100X
  • Print_ISBN
    0-7803-4093-0
  • Type

    conf

  • DOI
    10.1109/DAC.1997.597130
  • Filename
    597130
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2566648