• DocumentCode
    2566886
  • Title

    A 16-Core RISC Microprocessor with Network Extensions

  • Author

    Yalala, V. ; Brasili, D. ; Carlson, Darren ; Hughes, Ashley ; Jain, Abhishek ; Kiszely, T. ; Kodandapani, K. ; Varadharajan, A. ; Xanthopoulos, T.

  • Author_Institution
    Cavium Networks, Marlborough, MA
  • fYear
    2006
  • fDate
    6-9 Feb. 2006
  • Firstpage
    305
  • Lastpage
    314
  • Abstract
    A multi-core RISC processor is integrated with a number of security engines and network function accelerators creating a high-performance power-efficient SoC. It contains 180M transistors, dissipates 25W at 600MHz and is fabricated in a 1.2V 0.13mum CMOS process with 9 layers of copper interconnect using FSG dielectric and C4 bumps
  • Keywords
    CMOS integrated circuits; copper; integrated circuit interconnections; low-power electronics; microprocessor chips; reduced instruction set computing; system-on-chip; 0.13 micron; 1.2 V; 25 W; 600 MHz; C4 bumps; CMOS process; FSG dielectric; SoC; copper interconnect; multi-core RISC processor; network function accelerators; security engines; Acceleration; Circuits; Clocks; Coprocessors; Cryptography; Engines; Microprocessors; Multiplexing; Pipelines; Reduced instruction set computing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    1-4244-0079-1
  • Type

    conf

  • DOI
    10.1109/ISSCC.2006.1696061
  • Filename
    1696061