DocumentCode :
2567429
Title :
Design space exploration in multi-objective hierarchical SOC design
Author :
Han, Muhua ; Xie, Yufeng ; Liu, Leibo ; Wei, Shaojun
Author_Institution :
Tsinghua Univ., Beijing
fYear :
2007
fDate :
22-25 Oct. 2007
Firstpage :
118
Lastpage :
121
Abstract :
Nowadays, multi-objective hierarchical design methodology has received more attention for its applicability to deal with complex SOC design. Reducing decision data across hierarchy levels is crucial to the hierarchical designs. However, previous works overlooked the importance of this feature and just nested the optimizing procedures of multiple levels. This paper discussed the way to compress decision data across hierarchical levels. Pareto-optimal theory was employed and developed to explore the design space of multi-objective hierarchical system. Furthermore, this paper proved that, under the independence condition, optimization in each hierarchical level could be performed independently. This is the very first time to explore the design space of multi-objective hierarchical system formally, which contributes to the promotion of novel hierarchical partition and synthesis methodology.
Keywords :
Pareto optimisation; network synthesis; system-on-chip; Pareto-optimal theory; design space exploration; hierarchical partition; multi-objective hierarchical SOC design; synthesis methodology; Constraint optimization; Costs; Design methodology; Design optimization; Hierarchical systems; Iterative algorithms; Microelectronics; Partitioning algorithms; Space exploration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
Type :
conf
DOI :
10.1109/ICASIC.2007.4415581
Filename :
4415581
Link To Document :
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