• DocumentCode
    2567504
  • Title

    Research of adiabatic multiplier based on CTGAL

  • Author

    Jian, Xu ; Peng-jun, Wang ; Xiao-yang, Zeng

  • Author_Institution
    Ningbo Univ., Ningbo
  • fYear
    2007
  • fDate
    22-25 Oct. 2007
  • Firstpage
    138
  • Lastpage
    141
  • Abstract
    Based on the study of clocked transmission gate adiabatic logic (CTGAL) circuit, a new adiabatic multiplier is proposed in this paper. It consists of a partial-product generator, a partial-product compressor and a parallel prefix adder. CTGAL is used in all the circuits to charge and discharge the node capacitances without the threshold value losing and the charge on the output node capacitances can be recovered completely. So the power consumption of the newly designed circuits is significantly reduced. Computer simulation results verify the valid functionality and the significant energy recovery characteristic of the designed circuits.
  • Keywords
    adders; digital arithmetic; multiplying circuits; CTGAL; adiabatic multiplier; clocked transmission gate adiabatic logic; parallel prefix adder; partial product generator; partial-product compressor; Adders; Capacitance; Clocks; Computer simulation; Current supplies; Energy consumption; Image coding; Logic circuits; MOSFETs; Power supplies;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2007. ASICON '07. 7th International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    978-1-4244-1132-0
  • Electronic_ISBN
    978-1-4244-1132-0
  • Type

    conf

  • DOI
    10.1109/ICASIC.2007.4415586
  • Filename
    4415586