• DocumentCode
    2567862
  • Title

    A fast-settling PLL frequency synthesizer with direct frequency presetting

  • Author

    Xiaofei Kuang ; Nanjian Wu

  • Author_Institution
    Chinese Acad. of Sci., Beijing
  • fYear
    2006
  • fDate
    6-9 Feb. 2006
  • Firstpage
    741
  • Lastpage
    750
  • Abstract
    A PLL frequency synthesizer with frequency presetting is implemented in a 0.35mum CMOS process and occupies 0.4mm2. The output frequency is between 560 and 820MHz, the supply is 3.3V, the measured settling time is <10mus and the phase noise is -85dBe/Hz at 10kHz offset. The synthesizer can automatically compensate for frequency variation with temperature
  • Keywords
    CMOS integrated circuits; UHF integrated circuits; frequency synthesizers; phase locked loops; 0.35 micron; 3.3 V; 560 to 820 MHz; CMOS process; direct frequency presetting; frequency synthesizer; frequency variation; phase locked loop; Circuits; Delay; Filters; Frequency conversion; Frequency synthesizers; Phase frequency detector; Phase locked loops; Phase noise; Temperature sensors; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    1-4244-0079-1
  • Type

    conf

  • DOI
    10.1109/ISSCC.2006.1696113
  • Filename
    1696113
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2567862