• DocumentCode
    2568001
  • Title

    Comparator-based switched-capacitor circuits for scaled CMOS technologies

  • Author

    Sepke, T. ; Fiorenza, J.K. ; Sodini, Charlie G. ; Holloway, Peter R. ; Hae-Seung Lee

  • Author_Institution
    MIT, Cambridge, MA
  • fYear
    2006
  • fDate
    6-9 Feb. 2006
  • Firstpage
    812
  • Lastpage
    821
  • Abstract
    A comparator-based switched-capacitor (CBSC) design method for sampled-data systems utilizes topologies similar to traditional opamp-based methods but relies on the detection of the virtual ground using a comparator instead of forcing it with feedback. A prototype 10b CBSC 1.5b/stage pipelined ADC is implemented in a 0.18mum CMOS process. The converter operates at 8MHz and consumes 2.5mW
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; comparators (circuits); sampled data systems; switched capacitor networks; 0.18 micron; 10 bit; 2.5 mW; 8 MHz; pipelined ADC; sampled-data systems; scaled CMOS technologies; switched-capacitor circuits; Analog circuits; CMOS technology; Delay; Force feedback; Operational amplifiers; Sampling methods; Switched capacitor circuits; Switches; Switching circuits; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    1-4244-0079-1
  • Type

    conf

  • DOI
    10.1109/ISSCC.2006.1696121
  • Filename
    1696121