DocumentCode :
2568192
Title :
Design of low jitter adaptive-bandwidth charge pump PLL with passive filter
Author :
Ying, Song ; Yuan, Wang ; Song, Jia ; Baoying, Zhao ; Lijiu, Ji
Author_Institution :
Peking Univ., Beijing
fYear :
2007
fDate :
22-25 Oct. 2007
Firstpage :
319
Lastpage :
322
Abstract :
This paper presents a low jitter adaptive-bandwidth charge pump PLL with an improved passive filter. With an adaptive bandwidth, the proposed PLL maintains optimal performance over its whole operating range. In order to improve the jitter performance of the PLL, matching technique is employed in the charge pump, and a voltage-to-voltage converter is used to achieve a low gain VCO. The novel circuit has been implemented in 0.35 mum CMOS process. Post simulation results show that the PLL can scale its loop dynamics proportional to the operating frequency and has good jitter performance within its operating range from 100 MHz to 1.1 GHz.
Keywords :
passive filters; phase locked loops; voltage-controlled oscillators; CMOS process; complementary metal-oxide-semiconductor; loop dynamics; low gain VCO; low jitter adaptive bandwidth charge pump PLL; passive filter; phase locked loop; voltage-controlled oscillator; voltage-to-voltage converter; Bandwidth; CMOS process; Charge pumps; Circuits; Jitter; Passive filters; Performance gain; Phase locked loops; Voltage; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
Type :
conf
DOI :
10.1109/ICASIC.2007.4415631
Filename :
4415631
Link To Document :
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