Title :
A 2.5-Gb/s 0.13-μm CMOS current mode logic transceiver with pre-emphasis and equalization
Author :
Zhao, Zhenyu ; Wang, Jianjun ; Li, Shaoqing ; Chen, Jihua
Author_Institution :
Nat. Univ. of Defense Technol., Changsha
Abstract :
A 2.5-Gb/s current-mode logic (CML) transceiver is implemented in 0.13 - mum CMOS technology for serial inter-chip interconnection. To compensate the channel attenuation and other impairments, pre-emphasis circuit is included at the transmitter and equalizer at the receiver. 6-GHz 3 dB bandwidth is achieved through the use of active inductors instead of online spiral inductors. DC offset compensate circuits are employed in the output and input buffers to keep the common mode voltage stable. Layout simulation demonstrates the effectiveness of the transceiver. This transceiver consumes only 160 mw of power with 2.5v power supply. The die area of transmitter and receiver are 0.015 mm2, 0.01 mm2 respectively. The transceiver can be operated at 2.5-Gb/s with 100 mv receiver sensitivity.
Keywords :
CMOS logic circuits; current-mode circuits; equalisers; transceivers; CMOS current mode logic transceiver; CMOS technology; DC offset compensate circuit; active inductor; bandwidth 6 GHz; bit rate 2.5 Gbit/s; channel attenuation; complementary metal-oxide-semiconductor; equalization; gain 3 dB; power 160 mW; preemphasis circuit; receiver sensitivity; serial interchip interconnection; size 0.13 mum; voltage 100 mV; voltage 2.5 V; Active inductors; Attenuation; Bandwidth; CMOS logic circuits; CMOS technology; Equalizers; Integrated circuit interconnections; Spirals; Transceivers; Transmitters; CML; equalization; pre-emphasis; transceiver;
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
DOI :
10.1109/ICASIC.2007.4415643