• DocumentCode
    2568472
  • Title

    Implementations of dispatch rules in parallel manufacturing simulation

  • Author

    Lim, Chu-Cheow ; Low, Yoke-Hean ; Gan, Boon-Ping ; Jain, Sanjay

  • Author_Institution
    Gintic Inst. of Manuf. Technol., Singapore
  • Volume
    2
  • fYear
    1998
  • fDate
    13-16 Dec 1998
  • Firstpage
    1591
  • Abstract
    Most features in commercial simulation packages are often omitted in parallel simulation benchmarks, because they neither affect the overall correctness of the simulation protocol nor the benchmark´s performance. In our work on parallel simulation of a wafer fabrication plant, we however find several features which complicate the implementation of the simulation protocol and affect the program performance. One such feature is the dispatch rules which a machine set uses to decide the priority of the waiting wafer lots. In a sequential simulation, the dispatch rule can be implemented in a straightforward fashion, because the whole system state is at the same simulation time, and the rule simply reads the state variables (of any machine, resources, etc.) In a parallel simulation, the dispatch rule computation may be complicated by the fact that different portions of the simulated system can be at different simulation times. This paper describes our study of the implementation of dispatch rules in parallel simulation. This is actually an instance of the little-studied problem of providing shared-state information in parallel simulation. We briefly survey previous related work. We then outline two different approaches for a dispatch rule to access the shared-state information and compare them in terms of their ease of implementation
  • Keywords
    dispatching; electronic engineering computing; electronics industry; integrated circuit manufacture; parallel processing; production control; production engineering computing; queueing theory; time warp simulation; commercial simulation packages; dispatch rules; implementation ease; parallel manufacturing simulation; parallel simulation benchmarks; program performance; shared-state information; simulation protocol; simulation protocol correctness; simulation times; state variables; system state; wafer fabrication plant; waiting wafer lot priority; Atherosclerosis; Business communication; Computational modeling; Concurrent computing; Fabrication; Gallium nitride; Manufacturing processes; Packaging; Protocols; Virtual manufacturing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation Conference Proceedings, 1998. Winter
  • Conference_Location
    Washington, DC
  • Print_ISBN
    0-7803-5133-9
  • Type

    conf

  • DOI
    10.1109/WSC.1998.746034
  • Filename
    746034