DocumentCode
2568636
Title
CMOS dual-wideband low-noise amplifier with notch filter for 3.1GHz–10.6GHz ultra-wideband wireless receiver
Author
Huang, Zhe-Yang ; Huang, Che-Cheng
Author_Institution
Nat. Chiao Tung Univ., Hsin-Chu
fYear
2007
fDate
22-25 Oct. 2007
Firstpage
415
Lastpage
418
Abstract
In this paper a CMOS dual-wideband low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver radio system. The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaked load, a notch filter and an output buffer for measurement purpose. It is simulated in TSMC 0.18 um standard RF CMOS process. The LNA gives 13.66 dB maximum power gain between 3.0 GHz -4.9 GHz and 10.34 dB maximum power gain between 6.0 GHz-10.3 GHz while consuming 24.07 mW through a 1.8 V supply. Over the 3.1 GHz -4.9 GHz frequency band and the 6.0 GHz -10.3 GHz, a minimum noise figure is 2.6 dB and 3.8 dB. Input return loss lower than -8.3 ldB in all bandwidth have been achieved.
Keywords
CMOS integrated circuits; impedance matching; low noise amplifiers; notch filters; radio access networks; ultra wideband technology; wideband amplifiers; CMOS dual-wideband low-noise amplifier; RF CMOS process; cascode amplifiers; notch filter; shunt-peaked load; ultra-wideband wireless receiver radio system; wideband input impedance matching network; Broadband amplifiers; Gain; Impedance matching; Impedance measurement; Low-noise amplifiers; Matched filters; Radio frequency; Radiofrequency amplifiers; Receivers; Ultra wideband technology; LNA and Low-Noise Amplifier; Notch Filter; RFIC; UWB; Ultra-Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location
Guilin
Print_ISBN
978-1-4244-1132-0
Electronic_ISBN
978-1-4244-1132-0
Type
conf
DOI
10.1109/ICASIC.2007.4415655
Filename
4415655
Link To Document