Title :
A technology compensated current reference in standard CMOS
Author :
Eberlein, Matthias
Author_Institution :
Malaysia Microelectron. Solutions, Cyberjaya
Abstract :
An accurate current reference that compensates also for process variations is presented and realized in a 0.18 mum technology. This new concept allows tracking of oxide thickness in integrated MOS capacitors. The circuit uses SC-technique and adaptive biasing, together with inherent compensation. It is shown that 2-3% of accuracy over full process and temperature range can be achieved. Results for a different foundry are presented, too. The resistorless design is simple and suitable for low voltage. Power consumption is only 7.7 muA.
Keywords :
CMOS analogue integrated circuits; capacitors; compensation; integrated circuit design; low-power electronics; reference circuits; SC-technique; adaptive biasing; compensated current reference; current 7.7 muA; integrated MOS capacitors; low voltage operation; oxide thickness tracking; power consumption; resistorless design; size 0.18 mum; standard CMOS technology; CMOS technology; Channel bank filters; Frequency; Integrated circuit technology; MOS capacitors; MOS devices; MOSFETs; Resistors; Temperature; Voltage;
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
DOI :
10.1109/ICASIC.2007.4415682
