A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS

Author

Palaskas, Y. ; Ravi, Adit ; Pellerano, S. ; Carlton, B.R. ; Elmala, Mostafa A. ; Bishop, R. ; Banerjee, Gargi ; Nicholls, R.B. ; Ling, San ; Taylor, Stewart S. ; Soumyanath, K.

Author_Institution

Intel, Hilisboro, OR

fYear

2006

fDate

6-9 Feb. 2006

Firstpage

1420

Lastpage

1429

Abstract

A 5GHz 2times2 MIMO transceiver in 90nm CMOS supports spatial multiplexing and diversity, achieving 54/108Mb/s with -75/-63dBm sensitivity for an AWGN/25ns-Rayleigh channel, respectively. Each RX draws 120mA from a 1.4V supply. Each 3.3V 5GHz PA delivers +16/+13dBm average power with -25/-27dB EVM in 1times1/2times2 modes, respectively. The system-in-package including microstrip front-end matching on a flip-chip package occupies a die area of 18mm²

Keywords

AWGN channels; CMOS integrated circuits; MIMO systems; MMIC; Rayleigh channels; flip-chip devices; microstrip circuits; multiplexing; system-in-package; transceivers; 1.4 V; 108 Mbit/s; 120 mA; 3.3 V; 5 GHz; 90 nm; AWGN; CMOS; MlMO transceiver; PA; Rayleigh channel; flip-chip package; microstrip front-end matching; power amplifier; spatial multiplexing; system-in-package; Bandwidth; Baseband; Filters; Frequency; MIMO; Packaging; Phase noise; Radio transmitters; Transceivers; Transmitting antennas;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

1-4244-0079-1

Type

conf

DOI

10.1109/ISSCC.2006.1696192

Filename

1696192