A low-voltage 2.45GHz CMOS linear power amplifier

Author

Du, Chunshan ; Chen, Changyong

Author_Institution

Beijing JiaoTong Univ., Beijing

fYear

2007

fDate

22-25 Oct. 2007

Firstpage

573

Lastpage

576

Abstract

A low-voltage CMOS linear power amplifier (PA) is designed for 2.4 GHz ISM-band short range wireless communication in this paper. A novel adaptive biasing is adopted in the output stage, which dramatically increases the linear output power range as well as decreases the power dissipation at lower output power. The PA is a two-stage configuration and is implemented in 0.35 mum 3.3 V CMOS process. The spectreRF simulation results show that the PA can deliver +25.3 dBm of linear output power with a power gain of higher than 29 dB in -4 dBm input power range.

Keywords

CMOS analogue integrated circuits; UHF power amplifiers; circuit simulation; mobile communication; CMOS linear power amplifier; CMOS process; ISM-band short range wireless communication; adaptive biasing; frequency 2.4 GHz; linear output power range; power dissipation; size 0.35 mum; spectreRF simulation; voltage 3.3 V; CMOS process; Circuit simulation; Linearity; Low pass filters; Power amplifiers; Power dissipation; Power generation; Radiofrequency amplifiers; Voltage; Wireless communication; CMOS power amplifier; adaptive biasing; linear power amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2007. ASICON '07. 7th International Conference on

Conference_Location

Guilin

Print_ISBN

978-1-4244-1132-0

Electronic_ISBN

978-1-4244-1132-0

Type

conf

DOI

10.1109/ICASIC.2007.4415695

Filename

4415695