• DocumentCode
    2569440
  • Title

    An 8.3-GHz dual-modulus divide-by-31/32 prescaler using enhanced phase switching

  • Author

    Li, Dapeng ; Cai, Min

  • Author_Institution
    South China Univ. of Technol., Guangzhou
  • fYear
    2007
  • fDate
    22-25 Oct. 2007
  • Firstpage
    620
  • Lastpage
    623
  • Abstract
    A differential 8.3-GHz dual-modulus divide-by-31/32 prescaler is presented in this paper. Compared to the conventional prescaler using a serial of synchronous and asynchronous counters, the phase-switching technique enable only the first divide-by-two stage working at the full speed, maximizing operating frequency and reducing the overall power consumption. Enhanced 8-to-1 phase-switching technique and current-mode logic (CML) are utilized to achieve high operating speed at a comparatively low level of power consumption. The proposed prescaler will be fabricated in HEJIAN 0.18-mum mixed-mode and RFCMOS 1.8 V/3.3 V 1P6M process. It operates over a wide range from 200 MHz to 10 GHz, in which it typically draws a 7.3 mA current at 8.3 GHz from 1.8 V supply.
  • Keywords
    CMOS logic circuits; MMIC; UHF integrated circuits; current-mode logic; mixed analogue-digital integrated circuits; prescalers; RFCMOS process; asynchronous counters; current 7.3 mA; current-mode logic; dual-modulus divide-by-31/32 prescaler; enhanced phase switching; frequency 200 MHz to 10 GHz; mixed-mode integrated circuits; size 0.18 mum; voltage 1.8 V to 3.3 V; CMOS process; CMOS technology; Circuits; Energy consumption; Frequency conversion; Frequency synthesizers; Robustness; Signal generators; Synchronous generators; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2007. ASICON '07. 7th International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    978-1-4244-1132-0
  • Electronic_ISBN
    978-1-4244-1132-0
  • Type

    conf

  • DOI
    10.1109/ICASIC.2007.4415707
  • Filename
    4415707