Title :
Split Gate SOI MOSFET with Drain Dependent Bias for Short Channel Effects Reduction
Author_Institution :
Eng. Fac., Sabzevar Tarbiat Moallem Univ., Sabzevar, Iran
Abstract :
In order to reduce short channel effects, a new dual gate SOI MOSFET is proposed. In the proposed structure, a second gate is used with a drain dependent bias to screen the drain voltage and consequently reduce the threshold voltage reduction due to drain induced barrier lowering. Simulations show considerable improvement in short channel effects.
Keywords :
MOSFET; silicon-on-insulator; drain dependent bias; drain induced barrier; drain voltage; short channel effects reduction; split gate SOI MOSFET; threshold voltage reduction; Circuit simulation; Degradation; Doping profiles; Logic circuits; MOSFET circuits; Poisson equations; Signal processing; Silicon on insulator technology; Threshold voltage; Voltage control; SOI; short channel effects; split gate;
Conference_Titel :
2009 International Conference on Signal Processing Systems
Conference_Location :
Singapore
Print_ISBN :
978-0-7695-3654-5
DOI :
10.1109/ICSPS.2009.134
