DocumentCode :
256974
Title :
Thermal-aware architecture and mapping for multi-channel three-dimensional DRAM systems
Author :
Shu-Yen Lin ; Jin-Yi Lin
Author_Institution :
Dept. of Electr. Eng., Yuan Ze Univ., Jungli, Taiwan
fYear :
2014
fDate :
7-10 Oct. 2014
Firstpage :
713
Lastpage :
714
Abstract :
In this work, we propose a thermal-aware DRAM architecture and mapping for the multiple-channel three-dimensional DRAM system. A thermal-aware DRAM architecture with dual control and precharge circuits (Dual-CP) is proposed to avoid the accumulated temperature by the stacking of the control and precharge circuits. A thermal-aware bank remapping (BRMAP) is proposed to avoid the active banks in the adjacent DRAM layers.
Keywords :
DRAM chips; thermal management (packaging); BRMAP; Dual-CP circuits; active banks; adjacent DRAM layers; dual control and precharge circuits; multiple-channel three-dimensional DRAM system; thermal-aware DRAM architecture; thermal-aware bank remapping; Computer architecture; Random access memory; Stacking; Thermal analysis; Thermal management; Three-dimensional displays; Throughput; 3D DRAM Architecture; Thermal-Aware Mapping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics (GCCE), 2014 IEEE 3rd Global Conference on
Conference_Location :
Tokyo
Type :
conf
DOI :
10.1109/GCCE.2014.7031242
Filename :
7031242
Link To Document :
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