Title :
Power-conscious High Level Synthesis Using Loop Folding
Author :
Kim, Daehong ; Choi, Kiyoung
Author_Institution :
Seoul National University, Seoul, Korea, 151-742
Keywords :
Circuits; Concurrent computing; Costs; High level synthesis; Permission; Pipeline processing; Power dissipation; Power system reliability; Power systems; Voltage;
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-4093-0
DOI :
10.1109/DAC.1997.597188
