DocumentCode :
2569898
Title :
Cost-effective VDMOS for PDP scan driver IC
Author :
Li, Xiao-Ming ; Zhuang, Yi-Qi
Author_Institution :
Xidian Univ., Xian
fYear :
2007
fDate :
22-25 Oct. 2007
Firstpage :
733
Lastpage :
736
Abstract :
VDMOS integrated in scan driver chip for plasma display panels (PDP) is disclosed in the paper, which is based on the epitaxial Bipolar-CMOS- DMOS (BCD) process. The key considerations during the design are proposed here, and abundance simulation and process regulation is done on the structure and parameter optimization, by the testing on the VDMOS parameter and chip parameter, the results is favorable for 170 V PDP scan driver chip, which contributes to the competitive cost efficiency.
Keywords :
MOS integrated circuits; plasma displays; semiconductor epitaxial layers; PDP scan driver IC; cost-effective VDMOS; epitaxial bipolar-CMOS-DMOS process; parameter optimization; plasma display panels; scan driver chip; structure optimization; Bipolar integrated circuits; Costs; Design optimization; Driver circuits; Electric potential; Electrodes; Epitaxial layers; Microelectronics; P-n junctions; Plasma displays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
Type :
conf
DOI :
10.1109/ICASIC.2007.4415735
Filename :
4415735
Link To Document :
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