Title :
An ASIC implementation of MPEG audio decoders
Author :
Zhang, Hongsheng ; Lu, Mingying ; Wang, Guoyu
Author_Institution :
Chongqing Univ. of Posts & Telecommun, Chongqing
Abstract :
This paper presents a low power consumption and low cost MPEG audio decoder design architecture. An ASIC implementation of MPEG Layer II audio decoder is reported. The decoder just uses 20 K logic gates and the power consumption is only 10 mW using 0.18 micron CMOS technology. The development of MPEG4 AAC decoder using similar architecture is covered as well.
Keywords :
application specific integrated circuits; audio coding; decoding; logic gates; video coding; ASIC Implementation; MPEG layer II audio decoder; MPEG4 AAC decoder; logic gates; low cost MPEG audio decoder design architecture; low power consumption; Application specific integrated circuits; CMOS logic circuits; CMOS technology; Costs; Decoding; Digital signal processing; Energy consumption; Quantization; Silicon; Transform coding;
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
DOI :
10.1109/ICASIC.2007.4415740
