Title :
A Blocker-Vigilant Channel-Select Filter with Adaptive IIP3 and Power Dissipation
Author :
Yoshizawa, Atsushi ; Tsividis, Yannis
Author_Institution :
Columbia Univ., New York, NY
Abstract :
A dynamic biasing scheme that reduces the average dc power of channel-select filters is presented. An adaptive IIP3, 5th-order Butterworth low-pass filter is implemented in a 0.18mum CMOS process with a 1.8V supply voltage. The filter quiescent current is 1.2mA, with a -5dBV out-of-channel IIP3. With a blocker level of -13dBV, the supply current increases to 2.7mA and the IIP3 increases to +20dBV
Keywords :
Butterworth filters; CMOS analogue integrated circuits; low-pass filters; 0.18 micron; 1.2 mA; 1.8 V; CMOS process; adaptive IIP3; blocker-vigilant channel-select filter; dynamic biasing scheme; fifth-order Butterworth filter; filter quiescent current; low-pass filter; Adaptive filters; Circuits; Envelope detectors; Frequency; Linearity; MOSFETs; Open loop systems; Power dissipation; Transconductance; Voltage control;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696242
