DocumentCode :
2570255
Title :
The research and design of reconfigurable cipher processing architecture targeted at block cipher
Author :
Dai, Zi-bin ; Yang, Xiao-hui ; Ren, Qiao ; Yu, Xue-rong
Author_Institution :
PLA Inf. Eng. Univ., Zhengzhou
fYear :
2007
fDate :
22-25 Oct. 2007
Firstpage :
814
Lastpage :
817
Abstract :
The design of a cipher processing system adopts reconfigurable computing technology, which can support multiple cryptographic algorithms in the cipher application. Therefore, it can achieve crypto algorithms processing with efficiency and flexibility, and it also solves the hidden trouble in the cipher processing system. This paper has analyzed processing structure characteristics of popular block cipher algorithms, and proposed a reconfigurable cipher processing architecture (RCPA) combining the design method of reconfigurable processing architecture. And a prototype has been implemented successfully based on RCPA. The prototype is realized using Altera´s FPGA. Synthesis, placement and routing of RCPA have accomplished under 0.18 mum CMOS technology. The results prove that RCPA can achieve relatively high performance in block cipher algorithms processing.
Keywords :
cryptography; reconfigurable architectures; CMOS technology; block cipher algorithm processing; complementary metal-oxide-semiconductor; field programmable gate arrays; reconfigurable cipher processing architecture; reconfigurable computing technology; size 0.18 mum; Algorithm design and analysis; Computer architecture; Cryptography; Design methodology; Hardware; Parallel processing; Prototypes; Reconfigurable architectures; Reconfigurable logic; VLIW; Block cipher; RCPA; Reconfigurable;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
Type :
conf
DOI :
10.1109/ICASIC.2007.4415755
Filename :
4415755
Link To Document :
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