DocumentCode
2570428
Title
An Efficient Transistor Folding Algorithm For Row-based Cmos Layout Design
Author
Kim, Jaewon ; Kang, S.M.
Author_Institution
Quickturn Design Systems, Inc.
fYear
1997
fDate
9-13 June 1997
Firstpage
456
Lastpage
459
Keywords
Algorithm design and analysis; Circuit synthesis; Delay; Design methodology; MOSFETs; Permission; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location
Anaheim, CA, USA
ISSN
0738-100X
Print_ISBN
0-7803-4093-0
Type
conf
DOI
10.1109/DAC.1997.597191
Filename
597191
Link To Document