Title :
An Efficient Transistor Folding Algorithm For Row-based Cmos Layout Design
Author :
Kim, Jaewon ; Kang, S.M.
Author_Institution :
Quickturn Design Systems, Inc.
Keywords :
Algorithm design and analysis; Circuit synthesis; Delay; Design methodology; MOSFETs; Permission; Timing; Very large scale integration;
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-4093-0
DOI :
10.1109/DAC.1997.597191
