Title :
A reconfigurable modular arithmetic unit for public-key Cryptography
Author :
Chen, Tao ; Yu, Bin ; Su, Jin-Hai ; Dai, Zi-bin ; Liu, Jian-Guo
Author_Institution :
Inf. Eng. Univ., Zhengzhou
Abstract :
This paper analyzes the reconfigurable design principles of public-key cryptography and the characteristics of modular arithmetic iteration process. According to the analysis results, a structure-adaptive reconfigurable modular arithmetic unit for Public-key cryptography is implemented, which architecture is able to support both RSA and ECC(Fp) algorithms security parameters dynamic arbitrary changing. Based on 0.18 micrometer standard cell-library, the area of the chip is only 42000 mum2. Simulation results of post-synthesis indicate that the maximum operating clock frequency is 103.8 MHz, the 1024-bit RSA modular exponential operation period is about 45 ms, and the 192-bit ECC(Fp) point multiplication period is 17 ms on average.
Keywords :
iterative methods; microprocessor chips; public key cryptography; frequency 103.8 MHz; iteration process; modular arithmetic iteration; public-key cryptography; reconfigurable design; size 0.18 micron; structure-adaptive reconfigurable modular arithmetic unit; word length 1024 bit; word length 192 bit; Algorithm design and analysis; Arithmetic; Data security; Digital signatures; Elliptic curve cryptography; Elliptic curves; Information security; Processor scheduling; Public key cryptography; Scheduling algorithm; ECC; Modular arithmetic; Public-key cryptography; RSA; Reconfigurable computing;
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
DOI :
10.1109/ICASIC.2007.4415764