Title :
A 20gb/s 1:4 DEMUX without inductors in 0.13/spl mu/m CMOS
Author :
Kim, Byung-Guk ; Kim, Lee-Sup ; Byun, Sangjin ; Yu, Hyun-Kyu
Author_Institution :
KAIST, Daejeon
Abstract :
A 20Gb/s 1:4 DEMUX is implemented in a 0.13mum CMOS technology. The chip has no inductors and features a coupled latch with shared-current-source and buffer-insertion scheme, a divide-by-2 circuit with a static frequency divider, and a DLL. The measured eye-opening width and height are 71.3% and 52%, respectively. The 1.05times0.92mm 2 chip consumes 210mW from a 1.2V supply
Keywords :
CMOS integrated circuits; delay lock loops; demultiplexing equipment; frequency dividers; 0.13 micron; 1.2 V; 20 Gbit/s; 210 mW; CMOS technology; DEMUX; buffer-insertion scheme; coupled latch; delay lock loops; demultiplexer; divide-by-2 circuit; shared-current-source; static frequency divider; Bandwidth; CMOS technology; Circuits; Clocks; Delay; Energy consumption; Frequency conversion; Inductors; Latches; Timing;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696275
