DocumentCode :
2570803
Title :
A Power Management Scheme Controlling 20 Power Domains for a Single-Chip Mobile Processor
Author :
Hattori, Toshihiro ; lrita, T. ; Ito, Minora ; Yamamoto, Eiji ; Kato, Haruhisa ; Sado, G. ; Yamada, Y. ; Nishiyama, Koji ; Yagi, Hideki ; Koike, Toshiaki ; Tsuchihashi, Y. ; Higashida, Manabu ; Asano, Hiroya ; Hayashibara, I. ; Tatezawa, K. ; Shimazaki, Y
Author_Institution :
Renesas Technol., Tokyo
fYear :
2006
fDate :
6-9 Feb. 2006
Firstpage :
2210
Lastpage :
2219
Abstract :
A power-management scheme for a single-chip multi-CPU processor uses 20 power domains. The scheme enables the minimization of leakage currents in each operating mode: 299muA in paging operation and 7muA in stand-by. The techniques for controlling and implementing power domains are also described
Keywords :
leakage currents; low-power electronics; microprocessor chips; 299 muA; 7 muA; leakage current; paging operation mode; power domains; power management scheme; single-chip mobile processor; single-chip multiCPU processor; stand-by mode; Baseband; Cellular phones; Computer architecture; Energy consumption; Energy management; GSM; Ground penetrating radar; Multiaccess communication; Protocols; Telephone sets;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
1-4244-0079-1
Type :
conf
DOI :
10.1109/ISSCC.2006.1696282
Filename :
1696282
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2570803
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