Title :
A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process
Author :
Van der Plas, Geert ; Decoutere, Stefaan ; Donnay, Stéphane
Author_Institution :
IMEC, Leuven
Abstract :
A high-speed 4b flash ADC in 90nm digital CMOS is presented that uses a dynamic offset-compensation scheme in its comparators. It achieves a sampling rate of 1.25GS/s with 3.7 ENOB (23.8dB SNDR) from dc to Nyquist while consuming 2.5mW. It has an energy per conversion step of 0.16pJ
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; comparators (circuits); high-speed integrated circuits; 0.16 pJ; 2.5 mW; 4 bit; 90 nm; analog-to-digital converters; comparators; digital CMOS process; high-speed flash ADC; Bandwidth; CMOS process; Calibration; Capacitance; Capacitors; Circuits; Energy consumption; Preamplifiers; Sampling methods; Signal processing;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696294
