DocumentCode :
2571092
Title :
A 90nm CMOS 1.2v 6b 1GS/s two-step subranging ADC
Author :
Figueiredo, Pedro M. ; Cardoso, Paulo ; Lopes, Ana ; Fachada, Carlos ; Hamanishi, Naoyuki ; Tanabe, Ken ; Vital, João
Author_Institution :
Chipidea Microelectron., Porto Salvo
fYear :
2006
fDate :
6-9 Feb. 2006
Firstpage :
2320
Lastpage :
2329
Abstract :
A 1.2V 6b 1GS/s ADC is fabricated in a 90nm CMOS process, occupies 0.13mm2, and consumes 55mW. This ADC uses background offset-calibration to enable the use of minimum-size devices in pre-amplifiers and comparators. A solution that guarantees fast selection of the important reference voltages, and halves the number of switches in the resistor ladder, further improves high-frequency performance
Keywords :
CMOS integrated circuits; analogue-digital conversion; comparators (circuits); nanoelectronics; preamplifiers; 1.2 V; 55 mW; 90 nm; CMOS process; analog-to-digital converter; comparators; preamplifiers; resistor ladder; Calibration; Hardware; High speed optical techniques; Linearity; Memory; Power dissipation; Quantization; Signal resolution; Ultra wideband communication; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
1-4244-0079-1
Type :
conf
DOI :
10.1109/ISSCC.2006.1696295
Filename :
1696295
Link To Document :
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